One or more aspects relate, in general, to processing within a computing environment, and in particular, to processing associated with prefetch instructions.
Computing environments provide a memory hierarchy that includes, for instance, multiple levels of data caches, including a level one (L1) cache and at least one higher level cache, and main memory.
Applications operating on large amounts of in-memory data typically waste much of their time waiting for data to be transferred from memory, through the cache hierarchy, to the L1 data cache before it can be processed. To minimize this wasted time, and to improve performance, applications place prefetch instructions in their code.
Examples of prefetch instructions include the Prefetch Data (PFD) and Prefetch Data Relative Long (PFDRL) instructions, as defined in the z/Architecture offered by International Business Machines Corporation, Armonk, N.Y. The prefetch instructions instruct the central processing unit (CPU) to prefetch data of a cache line into a local data cache prior to the time that data is needed. Therefore, when the CPU actually needs data from the cache line for a subsequent load or store instruction, it is typically already in the cache, or at least on its way to being delivered from a higher level cache or main memory.